MWC20

Book a meeting with us at MWC '20

AccelerComm Team is delighted to be back at Mobile World Congress


AccelerComm are once again demonstrating commercially ready software-only IP for 5G NR in support of virtualized networks live at Mobile World Congress.

The introduction of AccelerComm’s IP enables developers and manufacturers to create soft implementations of infrastructure solutions that meet the performance required by the 3GPP specification while providing maximum flexibility.

As the market embraces open architectures defined by the O-RAN alliance, the availability of complete 3GPP-compliant channel coding chains optimised for implementation in software-only, FPGA or ASIC platforms will enable AccelerComm’s customers to accelerate 5G technology developments while maximising spectrum efficiency through excellent BLER performance.

AccelerComm’s CTO, Professor Rob Maunder, commented: “Flexibility is key to success when developing advanced communications and these high performance standardized architectures in the wireless infrastructure market are enabling that flexibility while helping to reduce development time. ” 

Book a Meeting with CTO, Rob Maunder and Sales Director, Rob Barnes to discover more about our high performance configurable IP

More about our stand at MWC

Polar and LDPC coding have been selected by 3GPP as part of the 5G NR specification. AccelerComm’s high performance offering is 100 percent compliant with the standard and covers the total processing chain, from the 3GPP TS 38.212 standard including the encode / decode engine, channel interleaving, rate matching, and CRC. The reduced latency of the AccelerComm solution can enable effective deployment of higher order numerology systems.

AccelerComm’s software Physical Uplink Control Channel (PUCCH) decoding IP is fully compatible with 3GPP New Radio v15.4.0, The Block Error Rate (BLER) performance of its PUCCH decoding IP and the average processing time of its SCL decoder core are fully characterised in the software datasheet available in our resources page or the datasheet link below. AccelerComm’s decoding IP offers superior processing throughput; up to 3.5 times higher than the Intel SCL decoder core provided in the FlexRAN SDK, and offers up to 0.3dB improved BLER performance. This enables more users to be served with less compute power, achieving greater capacity on a given cell.

For more information please download the Datasheet here

Accelercomm product demos at MWC Barcelona are:

  1. 3dB saving through advanced channel estimation:
    • See early demonstration of our next generation 5G equaliser.
  2. Polar software 3GPP compliant core implementation:
    • Polar decoder running on an Intel X-Series processor with AVX 512 acceleration.
  3. Polar FPGA 3GPP compliant chain implementation:
    • Polar encode and decode chain running on both Intel's and Xilinx FPGA.
  4. LDPC FPGA 3GPP compliant chain reference implementation: 
    • LDPC encoder & decoder chain running on both Intel's and Xilinx FPGA.

5G Technical Data CTA

Check out some videos of our stand from MWC19

5G NR Polar channel coding on x86 and AVX512 only
LDPC Channel Code for 5G NR
5G NR Polar and LDPC Channel codes from Accelercomm

About AccelerComm

AccelerComm provides LDPC, polar and turbo solutions which enable optimal performance of communication systems, and solves the challenges that would otherwise limit the speed of next generation communications, namely the error correction decoding that is required to overcome the effects of noise, interference and poor signal strength. 

For further information visit: www.accelercomm.com.

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